Apple Expands Its American Manufacturing Program — But Who Will Package the Chips?

On March 26, 2026, Apple announced that Bosch, Cirrus Logic, TTD, and Qnity Electronics are joining its American Manufacturing Program (AMP) — a $400 million commitment through 2030 to produce critical materials and components in the United States. The move expands AMP beyond its original partners — Corning, GlobalWafers America, Applied Materials, Texas Instruments, Samsung, GlobalFoundries, Amkor, Broadcom, Coherent, and MP Materials — and brings the program’s total U.S. investment commitment to $600 billion over four years.

The AMP expansion is not happening in isolation. Last October, Amkor Technology officially broke ground on a $7 billion advanced semiconductor packaging and test campus in Peoria, Arizona — the first U.S.-based high-volume advanced packaging facility. Backed by CHIPS for America incentives and partnerships with Apple, NVIDIA, and TSMC, Amkor’s campus is designed to package and test Apple silicon produced at the nearby TSMC Arizona fab. The Semiconductor Industry Association reports that over $820 billion in private semiconductor investments have been announced across 30 states since 2020, with the Department of Commerce awarding $33 billion in CHIPS grants and $7.15 billion in loans to 35 companies across 52 projects.

These are not abstract numbers. They represent a genuine structural shift in where and how America builds electronics. But for the engineers, packaging specialists, process technicians, and supply-chain leaders who actually manufacture and qualify electronic assemblies — not just plan capital expenditures — the more critical question is: what happens between the fab and the finished product?

The packaging bottleneck is now a domestic process capability question

For decades, advanced semiconductor packaging — flip-chip, fan-out wafer-level packaging, 2.5D and 3D stacking, System-in-Package — has been concentrated in Asia. Taiwan, China, South Korea, and Malaysia collectively dominate the outsourced semiconductor assembly and test (OSAT) market. The reshoring conversation has largely focused on front-end wafer fabrication, where the CHIPS Act’s incentives are most visible. But the back-end — the packaging, test, and assembly processes that transform a bare die into a functioning, qualified electronic component — is where the real domestic process gap sits.

Apple’s AMP expansion makes this explicit. The program now spans the entire silicon supply chain: wafers (GlobalWafers America), fabrication equipment (Applied Materials), chip fabrication (TSMC Arizona, Texas Instruments, Samsung, GlobalFoundries), and — critically — packaging and test (Amkor). Tim Cook’s August 2025 announcement that the program is on track to produce more than 19 billion U.S.-made chips in 2025 underscores the scale. But each of those 19 billion chips must still pass through downstream process steps — cleaning, lead preparation, tinning, wire bonding, die attach, underfill, conformal coating, and final assembly — before it becomes a usable component in a defense radar module, a medical device controller, or a high-reliability RF assembly.

As Amkor CEO Giel Rutten stated at the Arizona groundbreaking: the facility will “support key customers including Apple and NVIDIA” and “complement TSMC’s front-end wafer fabrication for full end-to-end semiconductor manufacturing.” U.S. Secretary of Commerce Howard Lutnick called it “a bold step” that will “bring high volume advanced packaging to the U.S. for the first time.” These are real capabilities being built. But they represent the tip of the iceberg.

The process steps that sit between a wafer and a qualified assembly

The advanced packaging facilities making headlines in 2026 — Amkor’s Arizona campus, TSMC’s planned U.S. packaging fabs, Intel’s Foveros expansion in New Mexico, GlobalFoundries’ advanced packaging and photonics center in New York — are designed to handle leading-edge die-level packaging. But the domestic electronics manufacturing ecosystem depends on more than advanced packaging. It depends on the full chain of process-critical steps that connect a packaged die to a qualified, field-ready electronic assembly:

Precision cleaning and contamination control. As feature sizes shrink and packaging density increases, sensitivity to ionic contamination, particulate residue, and flux residue grows. A chip produced in Phoenix or Sherman, Texas is only as reliable as the cleaning, degreasing, and passivation processes applied at every assembly stage — especially in defense and aerospace applications where long-lifecycle reliability is non-negotiable. Vapor degreasing, aqueous cleaning, and specialized solvent processes that meet IPC and MIL-spec cleanliness requirements are not optional infrastructure. They are the process foundation that determines whether a domestically packaged chip meets qualification standards or gets rejected.

Component lead forming, cutting, and tinning. Many critical defense and aerospace systems still depend on older-generation components with production histories spanning decades. The ability to bring components to known-good condition — with repeatable lead forming, cutting, and tinning processes that ensure solderability and compliance with downstream assembly specifications — is a supply-chain necessity, not an afterthought. As the FAR Council’s proposed rule implementing Section 5949 of the FY23 NDAA makes clear, federal buyers must certify that products do not incorporate prohibited semiconductors. Full bill-of-materials traceability from die through final assembly is now a compliance requirement. Component reconditioning — bringing older parts to known-good, documented condition — directly supports this.

Wire bonding and microassembly. Thermosonic, ultrasonic, and thermocompression wire bonding in high-reliability applications requires controlled environments and process fixtures that meet the same reliability standards as the fab itself. Contamination at the wire bonding stage — even trace ionic residue — can compromise bond integrity and produce latent field failures. For semiconductor packaging teams, RF/microwave assembly groups, and EMS providers building capacity in the U.S., the wire bonding process ecosystem is not a separate discussion from advanced packaging. It is the same discussion.

Thermal and vacuum process equipment. Controlled-atmosphere reflow, vacuum bake-out, and thermal processing at the assembly level are critical for moisture-sensitive components and high-reliability applications. The process equipment and controls infrastructure that supports these steps must be in place before domestic packaging capacity can be fully utilized.

Where Apple’s AMP partners actually are — and where the process ecosystem still needs investment

Apple’s AMP partner list is instructive. It includes Corning (glass), Coherent (VCSEL lasers), GlobalWafers America (wafers), Applied Materials (equipment), Texas Instruments and Samsung (fabrication), GlobalFoundries (fabrication), Amkor (packaging), Broadcom (RF/ASICs), and MP Materials (rare earths). The new 2026 additions — Bosch (sensing ICs), Cirrus Logic (mixed-signal), TDK (TMR sensors), and Qnity Electronics (materials) — fill additional supply-chain gaps. But notice what is not on this list: the downstream process ecosystem that connects a packaged chip to a qualified electronic assembly in a defense system, a medical device, or an industrial controller.

The Apple Manufacturing Academy, launched in Detroit, is already training small- and medium-sized manufacturers in AI, automation, and smart manufacturing. This is valuable — but it addresses workforce capability, not process equipment infrastructure. For U.S. manufacturers building domestic electronics capability, the question is whether the process equipment and application support ecosystem for cleaning, lead preparation, wire bonding, component reconditioning, and assembly-level quality control can scale alongside the fab and packaging investments now underway.

This is not a hypothetical concern. The Moody’s analysis of 2026 semiconductor constraints argues that the industry’s most significant limitations now sit deep in the supply chain — in specialty materials, supplier concentration, qualification cycles, and the process infrastructure between fab output and finished product. As Apollo chief economist Torsten Slok warned, China’s electronics exports to the U.S. have surged, creating a “China Shock 2.0” that pressures domestic manufacturers to prove not just domestic sourcing, but domestic process capability — the ability to clean, prepare, assemble, and qualify components entirely within U.S.-based or North American manufacturing operations.

Made in America requires process capability, not just a label

The Apple AMP expansion and the Amkor groundbreaking represent real progress toward a domestic semiconductor supply chain. But the industry’s next challenge is not fab construction or packaging capacity — it is the process ecosystem that connects those investments to qualified, field-ready products. For the engineers and supply-chain leaders building that ecosystem, the critical infrastructure includes:

Precision cleaning equipment and processes — vapor degreasing, aqueous cleaning, and solvent-based contamination control that meet IPC-CC-530, IPC-TM-650, and MIL-STD cleaning requirements at the package and assembly level.

Component lead forming and preparation systems — automated lead forming, cutting, and tinning that ensure solderability, compliance with IPC-A-610 workmanship standards, and traceability for federal procurement documentation.

Legacy component reconditioning capability — the ability to bring older-generation components to known-good condition with documented process control, supporting both defense platform sustainment and federal procurement compliance under Section 5949.

Wire bonding and microassembly process support — controlled environments, process fixtures, and application support for high-reliability wire bonding in aerospace, defense, medical, and industrial electronics.

North American application engineering and process support — the expertise to qualify and optimize these processes for specific applications, component types, and cleanliness requirements — not just equipment delivery, but the engineering depth to make the process work in production.

Akrivis supports U.S. and North American manufacturers building this domestic electronics capability. Our focus areas — cleaning and contamination control, PCB and microassembly cleaning, vapor degreasing, lead forming and cutting, legacy component reconditioning, wire bonding process support, component tinning and solderability, and thermal and vacuum process equipment — are designed to address the process steps that sit between a packaged chip and a qualified, field-ready electronic assembly. We do not claim that our equipment is Made in USA or Buy American compliant unless independently verified. We support manufacturers who are building that capability.

The Apple AMP expansion is proof that semiconductor reshoring is moving from aspiration to execution. The process ecosystem that connects fab output to qualified product is where that execution will succeed or stall. For manufacturers ready to address that gap, our application engineers are available for a process review.

Published sources: Apple AMP Expansion (March 2026), Amkor Technology X.com (October 2025), Amkor Groundbreaking Press Release, SIA Semiconductor Supply Chain Investments (August 2026), Apple AMP Launch (August 2025).